AM79C961AVIW AMD (ADVANCED MICRO DEVICES), AM79C961AVIW Datasheet - Page 43

• Manufacturer Part Number: AM79C961AVIW
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C961AVIW

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / Rohs Status: Not Compliant

FUNCTIONAL DESCRIPTION
PCMCIA Operation
When a PCMCIA card is first plugged into a PCMCIA
host, all PCMCIA cards respond as a memory only
device. In the PCMCIA standard there are two memory
spaces, common memory and attribute memory. The
REG pin determines which memory space is selected.
After the host detects that the PCMCIA card is inserted,
the host reads a section of the attribute memory called the
CIS (Card Information Structure) which provides
configuration information about the inserted card. The
attribute memory is a byte wide memory which is only
addressable on even bytes. Consequently, odd byte
accesses are not defined for attribute memory. Mapped in
the CIS area are four Card Configuration Registers which
are physically located inside the PCnet-ISA II device. In
the PCnet-ISA II device there are four registers which are
located at decimal byte address 1008, 1010, 1012 and
1014, respectively. Inside the CIS data structure, there is
information which provides the base address of the Card
Configuration Registers.
Inside first Card Configuration Register is a configura-
tion index region which allows programming the device
to support I/O accesses. The PCnet-ISA II supports
PCMCIA’s Independent I/O address window mecha-
nism. When I/O Enable is set in the CCR 0 register the
PCnet-ISA II controller will respond to I/O commands.
The lower 5 address bits decode register accesses.
The PCMCIA host is expected to decode I/O address
bits 6 and above and only assert CE1 and/or CE2 if the
upper I/O address lines match. After the host has
mapped the PCMCIA’s card resources to the system,
the card should be visible by the system and the driver
may be loaded.
Serial EEPROM Support
The Serial EEPROM is not required in PCMCIA mode
but can be used to hold the contents of the IEEE address
Am79C961A
EEPROM. For cost purposes, it is recommended to
place the IEEE address in the CIS (Card Information
Structure) Attribute Memory.
Flash Memory Map
The PCnet-ISA II device supports either a single Flash or
EPROM device. The external flash device contains the
CIS area as well as an area located in common memory
used to hold software drivers. The attribute memory ori-
gin is located at byte 0. The common memory region is
accessed when REG is deasserted and an access to
common memory occurs. SMAM is normally connected
to an upper address line on the PCMCIA card. When a
high order address is asserted the Flash Memory will be
selected. Accesses to common memory when SMAM is
low will access the Shared RAM when Shared Memory
mode is selected. If Programmed I/O mode is used, the
SMAM can be tied high which will result in the Flash’s
base address being mapped to location zero.
Flash Memory Programming
The Flash Memory device can be read at anytime. In
order to program the flash device, the APWEN bit must
be set in ISACSR2 register to allow write operations to
the Flash or non-volatile EEPROM device.
Shared Memory vs. Programmed I/O
Implications
The PCnet-ISA II controller in PCMCIA modes allows for
the local packet buffer memory to be mapped into com-
mon memory or indirectly accessed through I/O ac-
cesses. If shared memory is chosen, the local SRAM will
be mapped as a memory resource. Consequently, the
CIS will have to indicate this requirement to the system.
If Programmed I/O is used no additional memory re-
sources will be required to be allocated by the system.
43