AM79C961AVIW AMD (ADVANCED MICRO DEVICES), AM79C961AVIW Datasheet - Page 55

• Manufacturer Part Number: AM79C961AVIW
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C961AVIW

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / Rohs Status: Not Compliant

DETAILED FUNCTIONS
EEPROM
Interface
The EEPROM supported by the PCnet-ISA II controller
is an industry standard 93C56 2-Kbit EEPROM device
which uses a 4-wire interface. This device directly inter-
faces to the PCnet-ISA II controller through a 4-wire
interface which uses 3 of the private data bus pins for
Data In, Data Out, and Serial Clock. The Chip Select
pin is a dedicated pin from the PCnet-ISA II controller.
Note: All data stored in the EEPROM is stored in bit-re-
versal format. Each word (16 bits) must be written into
the EEPROM with bit 15 swapped with bit 0, bit 14
swapped with bit 1, etc.
This is a 2-Kbit device organized as 128 x 16 bit words.
A map of the device as used in the PCnet-ISA II con-
troller is below. The information stored in the EEPROM
is as follows:
Interrupt request level
select 0
Interrupt request type
select 0
Name
DMA channel select 0
DMA channel select 1
IEEE address 6 bytes
Reserved10 bytes
EISA ID4 bytes
ISACSRs14 bytes
Plug and Play Defaults19 bytes
8-Bit Checksum1 byte
External Shift Chain2 bytes
Plug and Play Config Info192 bytes
Name
Register
Register
Index
0x70
0x71
Index
0x74
0x75
Read/write value indicating selected interrupt level. Bits[3:0] select which interrupt
level used for Interrupt 0. One selects IRQL 1, fifteen selects IRQL fifteen. IRQL 0 is
not a valid interrupt selection and represents no interrupt selection.
Read/write value indicating which type of interrupt is used for the Request Level
selected above.
Bit[1] : Level, 1 = high, 0 = low
Bit[0] : Type, 1 = level, 0 = edge
The PCnet-ISA II controller only supports Edge High and Level Low Interrupts.
Read/write value indicating selected DMA channels. Bits[2:0] select which DMA
channel is in use for DMA 0. Zero selects DMA channel 0, seven selects DMA
channel 7. DMA channel 4, the cascade channel is used to indicate no DMA channel
is active.
Read only with a value of 0x04.
DMA Channel Configuration
I/O Interrupt Configuration
Am79C961A
Important Note About The EEPROM
Byte Map
The user is cautioned that while the Am79C961A (PC-
net-ISA II) and its associated EEPROM are pin com-
p at i bl e t o th e i r p r e d ec es s o r s th e A m 7 9 C9 6 1
(PCnet-ISA
map structure in each of the EEPROMs are different
from each other.
The EEPROM byte map structure used for the
Am79C961A PCnet-ISA II has the addition of “MISC
Config 2, ISACSR9" at word location 10Hex. The
EEPROM byte map structure used for the Am79C961
PCnet-ISA+ does not have this.
Therefore, should the user intend to replace the PC-
net-ISA
reprogram the EEPROM to reflect the new byte map
structure needed and used by the PCnet-ISA II. For
additional information, refer to the Am79C961 PC-
net-ISA
entitled EEPROM and Serial EEPROM Byte Map.
+
+
with the PCnet-ISA II, care MUST be taken to
data sheet (PID #18183) under the sections
Definition
Definition
+
) and its associated EEPROM, the byte
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