EP9315-IBZ Cirrus Logic Inc, EP9315-IBZ Datasheet - Page 707
EP9315-IBZ
Manufacturer Part Number
EP9315-IBZ
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9315-IBZ
Controller Family/series
(ARM9)
Core Size
32 Bit
A/d Converter
12 Bits
Supply Voltage
3.3V
No. Of I/o Pins
65
Package / Case
352-PBGA
Clock Frequency
200MHz
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1263
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9315-IBZ
Manufacturer:
CIRRUS
Quantity:
13
Company:
Part Number:
EP9315-IBZ
Manufacturer:
CIRRUS
Quantity:
347
- Current page: 707 of 824
- Download datasheet (13Mb)
AC97GIS
DS785UM1
31
15
Address:
Definition:
Bit Descriptions:
30
14
29
13
28
12
0x8088_0090 - Read Only
Global Interrupt Status. The AC97GIS register is the global interrupt status
register. All bits are cleared to zero on reset. Each bit is the logical AND of the
corresponding bits in the AC97RGIS register and the AC97IM register.
RSVD:
SLOT2TXCOMPLETE:If this bit is set to “1”, the SLOT2TXCOMPLETE
CODECREADY:
WINT:
GPIOINT:
GPIOTXCOMPLETE:If this bit is set to “1”, the GPIOTXCOMPLETE interrupt
SLOT2RXVALID: If this bit is set to “1”, SLOT2RXVALID interrupt is
SLOT1TXCOMPLETE:If this bit is set to “1”, SLOT1TXCOMPLETE interrupt is
RSVD
27
11
26
10
25
9
Copyright 2007 Cirrus Logic
Reserved. Unknown During Read.
This bit is set to “1” during a wakeup when the codec
Wake-up Interrupt Status: If this bit is set to “1”, the Wake-
GPIO Interrupt Status: If this bit is set to “1”, the GPIOINT
24
8
interrupt is asserted.
indicates that it is ready by setting bit 15 of Slot0
up Interrupt is asserted.
interrupt is asserted.
is asserted.
asserted.
asserted.
23
7
RSVD
COMPLETE
SLOT2TX
22
6
CODEC
READY
21
5
WINT
20
4
GPIO
INT
19
3
COMPLETE
GPIOTX
18
EP93xx User’s Guide
2
AC’97 Controller
SLOT2R
XVALID
17
1
COMPLETE
SLOT1TX
16
22-19
0
22
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