EP9315-IBZ Cirrus Logic Inc, EP9315-IBZ Datasheet - Page 205

32-Bit Microcontroller IC

EP9315-IBZ

Manufacturer Part Number
EP9315-IBZ
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9315-IBZ

Controller Family/series
(ARM9)
Core Size
32 Bit
A/d Converter
12 Bits
Supply Voltage
3.3V
No. Of I/o Pins
65
Package / Case
352-PBGA
Clock Frequency
200MHz
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1263

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9315-IBZ
Manufacturer:
CIRRUS
Quantity:
13
Part Number:
EP9315-IBZ
Manufacturer:
CIRRUS
Quantity:
347
Part Number:
EP9315-IBZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
DS785UM1
Frame
D18
Ctr
0
Please note that as the frame number progresses, the bit pattern in each row moves to the
right one pixel. This type of pattern shown in an area may cause diagonal lines to appear as
though they are moving to the right. As previously stated, any image distortion greatly
depends on the application. However, the pattern shown in
tendency to demonstrate a walking distortion.
Assuming that the 3-bit input pattern that represents this 33% duty cycle grayscale is 0x2 (or
010b), the values in
table. In this mode, the X locations are ignored by the grayscale generation.
Finally, just for demonstration purposes, a matrix with mixed 3 and 4 count axes is shown in
Figure
Vert
D17
Ctr
0
7-8.
Horz
D16
Ctr
0
VCNT (lines)
base + 0x08
base + 0x28
base + 0x48
base + 0x68
Table 7-8. Programming 33% Duty Cycle into the Lookup Table
address
register
(pixels)
HCNT
Figure 7-7. Creating Bit Patterns that Move to the Right
Table 7-8
Frame 0
Frame 2
R
1
1
1
1
D
1
5
X
X
X
X
V
E
T
1
1
1
0
D
1
4
X
X
X
X
Copyright 2007 Cirrus Logic
are used to program this pattern into the grayscale look-up-
1
1
0
1
D
1
3
X
X
X
X
1
1
0
0
D
1
2
X
X
X
X
Raster Engine With Analog/LCD Integrated Timing and Interface
H O R Z
1
0
0
0
1
1
1
0
1
1
D
1
1
X
X
X
X
0
0
1
0
0
0
1
0
1
0
D
1
0
0
1
0
X
0
1
0
1
0
0
1
0
0
1
D
9
1
0
0
X
1
0
0
0
D
8
0
0
1
X
0
1
1
1
D
7
X
X
X
X
Frame 1
0
1
1
0
D
6
1
0
0
X
0
1
0
1
D
5
0
1
0
X
0
1
0
0
D
4
0
0
1
X
Figure 7-7
0
0
1
1
D
3
X
X
X
X
0
0
0
0
0
1
0
D
2
0
0
1
X
1
1
0
0
0
0
1
D
1
0
1
0
X
0
0
1
0
0
0
0
D
0
1
0
0
X
will have less of a
GrySclLUT
Address *4
EP93xx User’s Guide
Frame
00
01
10
11
Value
Pixel
010
010
010
010
7-23
7

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