EP9315-IBZ Cirrus Logic Inc, EP9315-IBZ Datasheet - Page 57

• Manufacturer Part Number: EP9315-IBZ
• Description: 32-Bit Microcontroller IC
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9315-IBZ

• Controller Family/series: (ARM9)
• Core Size: 32 Bit
• A/d Converter: 12 Bits
• Supply Voltage: 3.3V
• No. Of I/o Pins: 65
• Package / Case: 352-PBGA
• Clock Frequency: 200MHz
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9315A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1144 - KIT DEVELOPMENT EP9315 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1263

DS785UM1
0x8001_0090
0x8001_0094
0x8001_0096
0x8001_0098
0x8001_009C
0x8001_00A0
0x8001_00A4
0x8001_00A6
0x8001_00A8
0x8001_00AC
0x8001_00B0
0x8001_00B4
0x8001_00B6
0x8001_00B8
0x8001_00BC
0x8001_00C0
0x8001_00C4
0x8001_00C6
0x8001_00C8
0x8001_00D0
0x8001_00D4
0x8001_00D8
0x8001_00DC
0x8001_00E0
0x8001_00E4
0x8001_00E8
0x8001_00EC
0x8001_0100 - 0x8001_010C
0x8001_4000 - 0x8001_50FF
0x8002_xxxx
0x8002_0000
0x8002_0004
0x8002_0008
0x8002_000C
0x8002_0010
0x8002_0014
0x8002_0018
0x8002_001C
0x8002_0020
0x8002_0024
0x8002_0028
0x8002_002C
Address
TXDEnq
TXDThrshld
RXDQBAdd
RXDQBLen
RXDQCurLen
RXDCurAdd
RXDEnq
RXStsQBAdd
RXStsQBLen
RXStsQCurLen
RXStsQCurAdd
RXStsEnq
TXDQBAdd
TXDQBLen
TXDQCurLen
TXDQCurAdd
TXStsQBAdd
TXStsQBLen
TXStsQCurLen
TXStsQCurAdd
RXBufThrshld
TXBufThrshld
RXStsThrshld
TXStsThrshld
RXDThrshld
MaxFrmLen
RXHdrLen
MACFIFO
HcRevision
HcControl
HcCommandStatus
HcInterruptStatus
HcInterruptEnable
HcInterruptDisable
HcHCCA
HcPeriodCurrentED
HcControlHeadED
HcControlCurrentED
HcBulkHeadED
HcBulkCurrentED
Register Name
Table 2-8. Internal Register Map (Continued)
USB
Copyright 2007 Cirrus Logic
MAC Receive Descriptor Queue Base Address Register
MAC Transmit Descriptor Queue Base Address Register
MAC Transmit Descriptor Queue Current Length Register
MAC Transmit Descriptor Current Address Register
MAC Receive Buffer Threshold Register
MAC Transmit Descriptor Threshold Register
MAC Receive Descriptor Queue Base Length Register
MAC Receive Descriptor Queue Current Length Register
MAC Receive Descriptor Current Address Register
MAC Receive Descriptor Enqueue Register
MAC Receive Status Queue Base Address Register
MAC Receive Status Queue Base Length Register
MAC Receive Status Queue Current Length Register
MAC Receive Status Queue Current Address Register
MAC Receive Status Enqueue Register
MAC Transmit Descriptor Queue Base Length Register
MAC Transmit Descriptor Enqueue Register
MAC Transmit Status Queue Base Address Register
MAC Transmit Status Queue Base Length Register
MAC Transmit Status Queue Current Length Register
MAC Transmit Status Queue Current Address Register
MAC Transmit Buffer Threshold Register
MAC Receive Status Threshold Register
MAC Transmit Status Threshold Register
MAC Receive Descriptor Threshold Register
MAC Maximum Frame Length Register
MAC Receive Header Length Register
Reserved
MAC FIFO RAM
USB Host Controller Revision
USB Host Controller Control
USB Host Controller Command Status
USB Host Controller Interrupt Status
USB Host Controller Interrupt Enable
USB Host Controller Interrupt Disable
USB Host Controller HCCA
USB Host Controller Period CurrentED
USB Host Controller Control HeadED
USB Host Controller Control CurrentED
USB Host Controller Bulk HeadED
USB Host Controller Bulk CurrentED
ARM920T Core and Advanced High-Speed Bus (AHB)
Register Description
USB Registers
EP93xx User’s Guide
Lock
SW
2-19
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
2