MC68HC908AS60CFN Freescale Semiconductor, MC68HC908AS60CFN Datasheet - Page 370
MC68HC908AS60CFN
Manufacturer Part Number
MC68HC908AS60CFN
Description
IC MCU 60K FLASH 8MHZ 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC68HC908AS60CFN.pdf
(454 pages)
Specifications of MC68HC908AS60CFN
Core Processor
HC08
Core Size
8-Bit
Speed
8.4MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
40
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Quantity
Price
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Quantity:
5 510
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Manufacturer:
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Byte Data Link Controller-Digital (BDLC-D)
21.7.4 BDLC State Vector Register
Technical Data
Address:
This register is provided to substantially decrease the CPU overhead
associated with servicing interrupts while under operation of a multiplex
protocol. It provides an index offset that is directly related to the BDLC’s
current state, which can be used with a user-supplied jump table to
rapidly enter an interrupt service routine. This eliminates the need for the
user to maintain a duplicate state machine in software.
I0, I1, I2, and I3 — Interrupt Source Bits
Reset:
BSVR
Read:
Write:
$0C
$1C
$00
$04
$08
$10
$14
$18
$20
These bits indicate the source of the interrupt request that currently is
pending. The encoding of these bits are listed in
Freescale Semiconductor, Inc.
For More Information On This Product,
Byte Data Link Controller-Digital (BDLC-D)
$003E
Figure 21-20. BDLC State Vector Register (BSVR)
Bit 7
I3
0
0
0
0
0
0
0
0
1
0
0
Go to: www.freescale.com
I2
0
0
0
0
1
1
1
1
0
= Unimplemented
Table 21-5. BDLC Interrupt Sources
I1
0
0
1
1
0
0
1
1
0
6
0
0
I0
0
1
0
1
0
1
0
1
0
Cyclical redundancy check (CRC) error
I3
BDLC Tx data register empty (TDRE)
5
0
BDLC Rx data register full (RDRF)
Symbol invalid or out of range
Received IFR byte (RXIFR)
No interrupts pending
I2
Loss of arbitration
4
0
Interrupt Source
Received EOF
Wakeup
I1
3
0
MC68HC908AS60 — Rev. 1.0
I0
2
0
Table
21-5.
1
0
0
8 (highest)
0 (lowest)
Priority
1
2
3
4
5
6
7
Bit 0
0
0
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