MC68HC908AS60CFN Freescale Semiconductor, MC68HC908AS60CFN Datasheet - Page 358

• Manufacturer Part Number: MC68HC908AS60CFN
• Description: IC MCU 60K FLASH 8MHZ 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908AS60CFN

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Byte Data Link Controller-Digital (BDLC-D)
21.7.1 BDLC Analog and Roundtrip Delay
Technical Data
NOTE:
Address:
Figure 21-16. BDLC Analog and Roundtrip Delay Register (BARD)
This register programs the BDLC to compensate for various delays of
different external transceivers. The default delay value is 16 s. Timing
adjustments from 9 s to 24 s in steps of 1 s are available. The BARD
register can be written only once after each reset, after which they
become read-only bits. The register may be read at any time.
ATE — Analog Transceiver Enable Bit
This device does not contain an on-board transceiver. This bit should be
programmed to a logic 0 for proper operation.
RXPOL — Receive Pin Polarity Bit
Reset:
Read:
Write:
The analog transceiver enable (ATE) bit is used to select either the
on-board or an off-chip analog transceiver.
The receive pin polarity (RXPOL) bit is used to select the polarity of
an incoming signal on the receive pin. Some external analog
transceivers invert the receive signal from the J1850 bus before
feeding it back to the digital receive pin.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Select on-board analog transceiver
0 = Select off-chip analog transceiver
1 = Select normal/true polarity; true non-inverted signal from the
0 = Select inverted polarity, where an external transceiver inverts
Byte Data Link Controller-Digital (BDLC-D)
$003B
Bit 7
ATE
J1850 bus; for example, the external transceiver does not
invert the receive signal
the receive signal from the J1850 bus
1
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= Unimplemented
RXPOL
6
1
5
0
0
4
0
0
BO3
3
0
MC68HC908AS60 — Rev. 1.0
BO2
2
1
BO1
1
1
Bit 0
BO0
1