MC68HC908AS60CFN Freescale Semiconductor, MC68HC908AS60CFN Datasheet - Page 162

• Manufacturer Part Number: MC68HC908AS60CFN
• Description: IC MCU 60K FLASH 8MHZ 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908AS60CFN

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Clock Generator Module (CGM)
Technical Data
These conditions apply when the PLL is in automatic bandwidth control
mode:
The PLL also can operate in manual mode (AUTO = 0). Manual mode is
used by systems that do not require an indicator of the lock condition for
proper operation. Such systems typically operate well below f
and require fast startup.
These conditions apply when in manual mode:
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The ACQ bit (see
read-only indicator of the mode of the filter. See
Acquisition and Tracking
The ACQ bit is set when the VCO frequency is within a certain
tolerance,
a certain tolerance,
The LOCK bit is a read-only indicator of the locked state of the
PLL.
The LOCK bit is set when the VCO frequency is within a certain
tolerance,
a certain tolerance,
CPU interrupts can occur if enabled (PLLIE = 1) when the PLL’s
lock condition changes, toggling the LOCK bit. See
Control
ACQ is a writable control bit that controls the mode of the filter.
Before turning on the PLL in manual mode, the ACQ bit must be
clear.
Before entering tracking mode (ACQ = 1), software must wait a
given time, t
PLL by setting PLLON in the PLL control register (PCTL).
Software must wait a given time, t
before selecting the PLL as the clock source to CGMOUT
(BCS = 1).
The LOCK bit is disabled.
CPU interrupts from the CGM are disabled.
Clock Generator Module (CGM)
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Register.
TRK
Lock
acq
(see
, and is cleared when the VCO frequency is out of
, and is cleared when the VCO frequency is out of
10.6.2 PLL Bandwidth Control
24.2 Maximum
UNT
unl
. See
. See
Modes.
24.2 Maximum
24.2 Maximum
AL
, after entering tracking mode
Ratings), after turning on the
MC68HC908AS60 — Rev. 1.0
Ratings.
Ratings.
10.4.2.2
Register) is a
10.6.1 PLL
BUSMAX