MC68HC908AS60CFN Freescale Semiconductor, MC68HC908AS60CFN Datasheet - Page 212

• Manufacturer Part Number: MC68HC908AS60CFN
• Description: IC MCU 60K FLASH 8MHZ 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908AS60CFN

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Low-Voltage Inhibit (LVI) Module
15.4.3 False Reset Protection
15.5 LVI Status Register
Technical Data
Address:
The V
supply noise. In order for the LVI module to reset the MCU, V
remain at or below the LVI
cycles. V
MCU out of reset.
The LVI status register (LVISR) flags V
level
LVIOUT — LVI Output Bit
Reset:
Read: LVIOUT
Write:
This read-only flag becomes set when the V
LVI
Reset clears the LVIOUT bit.
Freescale Semiconductor, Inc.
.
LVI TRIPF
For More Information On This Product,
DD
TRIPF
$FE0F
Bit 7
DD
pin level is digitally filtered to reduce false resets due to power
0
V DD > LVI TRIPR
V DD
V DD
V DD
Low-Voltage Inhibit (LVI) Module
must be above LVI
voltage for 32 to 40 CGMXCLK cycles. See
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At Level:
Figure 15-3. LVI Status Register (LVISR)
V DD
= Unimplemented
LVI TRIPF
LVI TRIPF
LVI TRIPF
6
0
0
Table 15-1. LVIOUT Bit Indication
LVI TRIPR
TRIPF
5
0
0
V
DD
TRIPR
< 32 CGMXCLK cycles
> 40 CGMXCLK cycles
level for nine or more consecutive CPU
CGMXCLK Cycles:
CGMXCLK Ccycles
Between 32 and 40
4
0
0
For Number of
for only one CPU cycle to bring the
DD
Any
Any
voltages below the LVI
3
0
0
DD
MC68HC908AS60 — Rev. 1.0
voltage falls below the
2
0
0
Previous value
Table
LVIOUT
0 or 1
1
0
0
0
0
1
DD
15-1.
must
TRIPF
Bit 0
0
0