MC68HC908AS60CFN Freescale Semiconductor, MC68HC908AS60CFN Datasheet - Page 332

• Manufacturer Part Number: MC68HC908AS60CFN
• Description: IC MCU 60K FLASH 8MHZ 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908AS60CFN

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Byte Data Link Controller-Digital (BDLC-D)
21.4.1.2 Reset Mode
Technical Data
NETWORK ACTIVITY OR
OTHER MCU WAKEUP
BDLC STOP
Figure 21-3. BDLC Operating Modes State Diagram
(COP, ILLADDR, PU, RESET, LVR, POR)
ANY MCU RESET SOURCE ASSERTED
This mode is entered from power off mode whenever the BDLC supply
voltage, V
(V
reset must be asserted while powering up the BDLC or an unknown state
will be entered and correct operation cannot be guaranteed. Reset mode
is also entered from any other mode as soon as one of the MCU’s
possible reset sources (such as LVR, POR, COP watchdog, reset pin,
etc.) is asserted.
In reset mode, the internal BDLC voltage references are operative, V
is supplied to the internal circuits which are held in their reset state, and
the internal BDLC system clock is running. Registers will assume their
reset condition. Because outputs are held in their programmed reset
state, inputs and network activity are ignored.
V
DD
DD
Freescale Semiconductor, Inc.
STOP INSTRUCTION OR
WAIT INSTRUCTION AND WCM = 1
FROM ANY MODE
For More Information On This Product,
V
–10%) and some MCU reset source is asserted. The internal MCU
DD
Byte Data Link Controller-Digital (BDLC-D)
(MINIMUM)
DD
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, rises above its minimum specified value
POWER OFF
RESET
RUN
V
ANY MCU RESET SOURCE ASSERTED
DD
NO MCU RESET SOURCE ASSERTED
WAIT INSTRUCTION AND WCM = 0
> V
DD
(MINIMUM) AND
NETWORK ACTIVITY OR
OTHER MCU WAKEUP
BDLC WAIT
MC68HC908AS60 — Rev. 1.0
DD