MC68HC908AS60CFN Freescale Semiconductor, MC68HC908AS60CFN Datasheet - Page 366

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MC68HC908AS60CFN

Manufacturer Part Number
MC68HC908AS60CFN
Description
IC MCU 60K FLASH 8MHZ 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908AS60CFN

Core Processor
HC08
Core Size
8-Bit
Speed
8.4MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
40
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Byte Data Link Controller-Digital (BDLC-D)
Technical Data
NB = Normalization bit
ID = Identifier, usually the physical address of the responder(s)
HEADER
HEADER
HEADER
HEADER
TYPE 0 — NO IFR
TYPE 1 — SINGLE BYTE TRANSMITTED FROM A SINGLE RESPONDER
TYPE 2 — SINGLE BYTE TRANSMITTED FROM MULTIPLE RESPONDERS
TYPE 3 — MULTIPLE BYTES TRANSMITTED FROM A SINGLE RESPONDER
Figure 21-19. Types of In-Frame Response (IFR)
DATA FIELD
DATA FIELD
TSIFR — Transmit Single Byte IFR with No CRC (Type 1 or 2) Bit
If the programmer attempts to set the TSIFR bit immediately after the
EOD symbol has been received from the bus, the TSIFR bit will remain
in the reset state and no attempt will be made to transmit the IFR byte.
If a loss of arbitration occurs when the BDLC attempts to transmit and
after the IFR byte winning arbitration completes transmission, the BDLC
DATA FIELD
DATA FIELD
The TSIFR bit is used to request the BDLC to transmit the byte in the
BDLC data register (BDR) as a single byte IFR with no CRC.
Typically, the byte transmitted is a unique identifier or address of the
transmitting (responding) node. See
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = If this bit is set prior to a valid EOD being received with no CRC
0 = The TSIFR bit will be cleared automatically, once the BDLC
Byte Data Link Controller-Digital (BDLC-D)
error, once the EOD symbol has been received the BDLC will
attempt to transmit the appropriate normalization bit followed
by the byte in the BDR.
has successfully transmitted the byte in the BDR onto the
bus, or TEOD is set, or an error is detected on the bus.
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CRC
CRC
CRC
CRC
NB
NB
NB
ID
ID1
IFR DATA FIELD
Figure
MC68HC908AS60 — Rev. 1.0
21-19.
ID N
(OPTIONAL)
CRC

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