UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 739

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UPD70F3765GF-GAT-AX

Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3765GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
17.6 Operation
17.6.1 Data format
stop bit(s).
specification of MSB/LSB-first transfer are performed using the UCnCTL0 register.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Full-duplex serial data reception and transmission is performed.
As shown in Figure 17-7, one data frame of transmit/receive data consists of a start bit, character bits, parity bit, and
Specification of the character bit length within 1 data frame, parity selection, specification of the stop bit length, and
Moreover, control of UART output/inverted output for the TXDCn bit is performed using the UCnOPT0.UCnTDL bit.
• Start bit..................1 bit
• Character bits ........7 bits/8 bits
• Parity bit ................Even parity/odd parity/0 parity/no parity
• Stop bit ..................1 bit/2 bits
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
Page 739 of 1509

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