UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 481

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
each time the valid edge of external event count input is detected. Additionally, the set value of the TT0CCR0 register is
transferred to the CCR0 buffer register.
to 0000H, and a compare match interrupt request signal (INTTT0CC0) is generated.
“value set to TT0CCR0 register + 1” times.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
When the TT0CE bit is set to 1, the value of the 16-bit counter is cleared from FFFFH to 0000H. The counter counts
When the count value of the 16-bit counter matches the value of the CCR0 buffer register, the 16-bit counter is cleared
The INTTT0CC0 signal is generated each time the valid edge of the external event count input has been detected
TT0CTL0
TT0CTL1
TT0IOC2
(a) TMT0 control register 0 (TT0CTL0)
(b) TMT0 control register 1 (TT0CTL1)
(c) TMT0 I/O control register 2 (TT0IOC2)
(d) TMT0 counter read buffer register (TT0CNT)
(e) TMT0 capture/compare register 0 (TT0CCR0)
The count value of the 16-bit counter can be read by reading the TT0CNT register.
If the TT0CCR0 register is set to D
(D
0
TT0CE
+ 1) and the compare match interrupt request signal (INTTT0CC0) is generated.
0/1
0
0
Figure 9-16. Register Setting for Operation in External Event Count Mode (1/2)
TT0EST
0
0
0
TT0EEE
0
0
0
0
0
0
0
, the count is cleared when the number of external events has reached
TT0EES1
TT0MD3
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
0/1
0
0
TT0EES0 TT0ETS1 TT0ETS0
TT0CKS2 TT0CKS1 TT0CKS0
TT0MD2
0/1
0
0
TT0MD1 TT0MD0
0
0
0
0
0
1
Select valid edge
of external event
count input (EVTT0 pin)
0: Stops counting
1: Enables counting
0, 0, 0, 1:
External event count mode
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