UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 1047

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
21.3.2 Connection configuration
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(1) Series resistor connection to D+/D−
(2) Pull-up control of D+
Connect series resistors of 30 Ω ±5% to the D+/D− pins (UFDP, UFDM) of the USB function controller in the
V850ES/JG3-H and V850ES/JH3-H. If they are not connected, the impedance rating cannot be satisfied and the
output waveform may be disturbed.
Allocate the series resistors adjacent to the V850ES/JG3-H or V850ES/JH3-H, and make the length of the wiring
between the series resistors and the USB connectors the same, to make the impedance of D+ and D− equal (a
differential with 90 Ω ±5% is recommended).
Because the function controller of the V850ES/JG3-H and V850ES/JH3-H is fixed to full speed (FS), be sure to pull
up the D+ pin (UFDP) by 1.5 kΩ ±5% to UV
To disable a connection report (D+ pull up) to the USB host/HUB (such as during high priority servicing or
initialization), control the pull-up resistor of D+ via a general-purpose port in the system. For a circuit such as the
one shown in Figure 21-3, control the pull-up control signal and the VBUS input signal of the D+ pin by using a
general-purpose port and the USB cable VBUS (AND circuit). In Figure 21-3, if the general-purpose port is low
level, pulling up of D+ is prohibited.
For the IC2 in Figure 21-3, use an IC to which voltage can be applied when the system power is off.
Insert a series resistor adjacent to
the V850ES/JG3-H or V850ES/JH3-H.
Make the length of the wiring between
resistors and D+/D− of the USB connector
the same.
V850ES/JG3-H,
V850ES/JH3-H
P42/INTP10
UDMF
UDPF
P41
Figure 21-3. Example of USB Function Controller Connection
30 Ω ±5%
30 Ω ±5%
Schmitt buffer
recommended
UV
DD
Determine the pull-up resistor value in accordance
with the buffer type (pull-down/pull-up) of the port
pin to be used.
DD
IC1
.
VBUS is resistance-
divided at a ratio of R1:R2.
CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R2
UV
DD
R1
IC2
50 kΩ or more
(floating protection)
Connect a pull-up
resistor to D+.
1.5 kΩ ±5%.
USB connector
VBUS
D+
D−
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