UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 1313

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UPD70F3765GF-GAT-AX

Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3765GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
25.4 IDLE1 Mode
25.4.1 Setting and operation status
normal operation mode.
other on-chip peripheral functions stops.
The CPU and other on-chip peripheral functions stop operating. However, the on-chip peripheral functions that can
operate with the subclock or an external clock continue operating.
on-chip peripheral functions. The main clock oscillator does not stop, so the normal operation mode can be restored
without waiting for the oscillation stabilization time after the IDLE1 mode has been released, in the same manner as when
the HALT mode is released.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
The IDLE1 mode is set by setting the PSMR.PSM1 and PSMR.PSM0 bits to 00 and setting the PSC.STP bit to 1 in the
In the IDLE1 mode, the clock oscillator, PLL, and flash memory continue operating but clock supply to the CPU and
As a result, program execution stops and the contents of the internal RAM before the IDLE1 mode was set are retained.
Table 25-5 shows the operating status in the IDLE1 mode.
The IDLE1 mode can reduce the power consumption more than the HALT mode because it stops the operation of the
Cautions 1. Insert five or more NOP instructions after the instruction that stores data in the PSC register to
2. If the IDLE1 mode is set while an unmasked interrupt request signal is being held pending, the
set the IDLE1 mode.
IDLE1 mode is released immediately by the pending interrupt request.
CHAPTER 25 STANDBY FUNCTION
Page 1313 of 1509

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