UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 167
UPD70F3765GF-GAT-AX
Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3765GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Pin Name
P70
P71
P72
P73
P74
P75
P76
P77
P78
P79
P710
P711
P90
P91
P92
Notes 1. V850ES/JH3-H only
2. When using as the A0 to A15 pins, be sure to set all 16 bits of the PMC9 register to FFFFH at once.
ANI0
ANI1
ANI2
ANI3
ANI4
ANI5
ANI6
ANI7
ANI8
ANI9
ANI10
ANI11
KR6
TXDC1
SDA02
A0
KR7
RXDC1
SCL02
A1
TENC01
TIT01
TOT01
A2
Alternate Function
Name
Note 1
Note 1
Note 1
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
I/O
Output
Input
Input
I/O
Output
Input
Input
Output
Output
I/O
P70 = Setting not required
P71 = Setting not required
P72 = Setting not required
P73 = Setting not required
P74 = Setting not required
P75 = Setting not required
P76 = Setting not required
P77 = Setting not required
P78 = Setting not required
P79 = Setting not required
P710 = Setting not required
P711 = Setting not required
P90 = Setting not required
P90 = Setting not required
P90 = Setting not required
P90 = Setting not required
P91 = Setting not required
P91 = Setting not required
P91 = Setting not required
P91 = Setting not required
P92 = Setting not required
P92 = Setting not required
P92 = Setting not required
P92 = Setting not required
Pn Register
Pnx Bit of
PM70 = 1
PM71 = 1
PM72 = 1
PM73 = 1
PM74 = 1
PM75 = 1
PM76 = 1
PM77 = 1
PM78 = 1
PM79 = 1
PM710 = 1
PM711 = 1
PM90 = Setting not required PMC90 = 1
PM90 = Setting not required PMC90 = 1
PM90 = Setting not required PMC90 = 1
PM90 = Setting not required PMC90 = 1
PM91 = Setting not required PMC91 = 1
PM91 = Setting not required PMC91 = 1
PM91 = Setting not required PMC91 = 1
PM91 = Setting not required PMC91 = 1
PM92 = Setting not required PMC92 = 1
PM92 = Setting not required PMC92 = 1
PM92 = Setting not required PMC92 = 1
PM92 = Setting not required PMC92 = 1
Table 4-20. Using Port Pin as Alternate-Function Pin (6/10)
PMn Register
PMnx Bit of
PMCn Register
PMCnx Bit of
−
−
−
−
−
−
−
−
−
−
−
−
PFCE90 = 0
PFCE90 = 0
PFCE90 = 1
PFCE90 = 1
PFCE91 = 0
PFCE91 = 0
PFCE91 = 1
PFCE91 = 1
PFCE92 = 0
PFCE92 = 0
PFCE92 = 1
PFCE92 = 1
PFCEn Register
PFCEnx Bit of
−
−
−
−
−
−
−
−
−
−
−
−
PFC90 = 0
PFC90 = 1
PFC90 = 0
PFC90 = 1
PFC91 = 0
PFC91 = 1
PFC91 = 0
PFC91 = 1
PFC92 = 0
PFC92 = 1
PFC92 = 0
PFC92 = 1
PFCn Register
PFCnx Bit of
−
−
−
−
−
−
−
−
−
−
−
−
PF90 (PF9) = 1
Note 2
PF91 (PF9) = 1
Note 2
Note 2
(Registers)
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