UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 914

• Manufacturer Part Number: UPD70F3765GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3765GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
20.3.7 Baud rate control function
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(1) Prescaler
(2) Data bit time (8 to 25 time quanta)
Time segment 1 (TSEG1)
Time segment 2 (TSEG2)
reSynchronization Jump Width
(SJW)
Remark
The CAN controller has a prescaler that divides the clock (f
protocol layer base clock (f
CAN0 module bit rate prescaler register (C0BRP)).
One data bit time is defined as shown in Figure 20-18.
The CAN controller sets the data bit time by replacing it with the bit timing parameters such as time segment 1,
time segment 2, and reSynchronization Jump Width (SJW), as shown in Figure 20-18. Time segment 1 is
equivalent to the total of the propagation (prop) segment and phase segment 1 that are defined by the CAN
protocol specification. Time segment 2 is equivalent to phase segment 2.
1 Time Quanta = 1/f
Segment name
IPT: Information Processing Time
TQ: Time Quanta
Sync segment
TQ
2TQ to 16TQ
1TQ to 8TQ
1TQ to 4TQ
TQ
) that is the CAN module system clock (f
Settable range
Prop segment
Figure 20-18. Segment Setting
Time segment 1 (TSEG1)
Data bit time (DBT)
Phase segment 1
IPT of the CAN controller is 0TQ. To conform to the CAN
protocol specification, therefore, a length equal or less to
phase segment 1 must be set here. This means that the
length of time segment 1 minus 1TQ is the settable upper
limit of time segment 2.
The length of time segment 1 minus 1TQ or 4TQ,
whichever smaller.
Notes on setting to conform to CAN specification
CAN
Sample point (SPT)
) supplied to CAN. This prescaler generates a CAN
CANMOD
Phase segment 2
Time segment 2
CHAPTER 20 CAN CONTROLLER
(TSEG2)
−
) divided by 1 to 256 (see 20.6 (12)
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