UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 1121

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UPD70F3765GF-GAT-AX

Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3765GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(36) UF0 active alternative setting register (UF0AAS)
Remark
UF0AAS
Bit position
This register specifies a link between the Interface number and Alternative Setting.
This register can be read or written in 8-bit units.
USBF of the V850ES/JG3-H and V850ES/JH3-H can set a five-series Alternative Setting (Alternate Setting 0, 1, 2,
3, and 4 can be defined) and a two-series Alternative Setting (Alternative Setting 0 and 1 can be defined) for one
Interface.
For example, when the UF0AIFN register is set to 82H and the UF0AAS register is set to 15H, Interfaces 0, 1, 2,
and 3 are valid. Interfaces 0 and 2 support only Alternative Setting 0. Interface 1 supports Alternative Setting 0
and 1, and Interface 3 supports Alternative Setting 0, 1, 2, 3, and 4. With this setting, requests GET_INTERFACE
wIndex = 0/1/2/3, SET_INTERFACE wValue = 0 & wIndex = 0/2, SET_INTERFACE wValue = 0/1 & wIndex = 1,
and SET_INTERFACE wValue = 0/1/2/3/4 & wIndex = 3 are automatically responded to, and a STALL response is
made to the other GET/SET_INTERFACE requests.
6, 5,
7, 3
2, 1
4, 0
n = 2, 5
ALT2
7
ALTn
IFALn1, IFALn0
ALTnEN
Bit name
IFAL21
6
IFAL20
These bits specify whether an n-series Alternative Setting is linked with Interface 0. When
these bits are set to 1, the setting of the IFALn1 and IFALn0 bits is invalid.
These bits specify the Interface number to be linked with the n-series Alternative Setting.
If the linked Interface number is outside the range specified by the UF0AIFN register, the
n-series Alternative Setting is invalid (ALTnEN bit = 0).
Do not link a five-series Alternative Setting and a two-series Alternative Setting with the
same Interface number.
These bits validate the n-series Alternative Setting. Unless these bits are set to 1, the
setting of the ALTn, IFALn1, and IFALn0 bits is invalid.
5
1: Link n-series Alternative Setting with Interface 0.
0: Do not link n-series Alternative Setting with Interface 0 (default value).
1: Validate the n-series Alternative Setting.
0: Do not validate the n-series Alternative Setting (default value).
IFALn1
1
1
0
0
ALT2EN
4
IFALn0
1
0
1
0
ALT5
CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
3
Links Interface 4.
Links Interface 3.
Links Interface 2.
Links Interface 1.
IFAL51
2
Function
IFAL50
Interface number to be linked
1
ALT5EN
0
00200082H
Address
Page 1121 of 1509
After reset
00H

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