DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 557

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 0—Start Condition/Stop Condition Prohibit (SCP): Controls the issuing of start and stop
conditions in master mode. To issue a start condition, write 1 in BBSY and 0 in SCP. A retransmit
start condition is issued in the same way. To issue a stop condition, write 0 in BBSY and 0 in SCP.
This bit is always read as 1. If 1 is written, the data is not stored.
16.2.6
ICSR is an 8-bit readable/writable register that performs flag confirmation and acknowledge
confirmation and control.
ICSR is initialized to H'00 by a reset and in hardware standby mode.
Bit 0
SCP
0
1
Bit
Initial value
Read/Write
Note: * Only 0 can be written, to clear the flags.
I
2
C Bus Status Register (ICSR)
Description
Writing 0 issues a start or stop condition, in combination with the BBSY flag
Reading always returns a value of 1
Writing is ignored
R/(W) *
ESTP
7
0
R/(W) *
STOP
6
0
R/(W) *
IRTR
5
0
R/(W) *
AASX
4
0
Rev. 4.00 Sep 27, 2006 page 511 of 1130
R/(W) *
AL
3
0
Section 16 I
R/(W) *
AAS
2
0
2
C Bus Interface [Option]
R/(W) *
ADZ
REJ09B0327-0400
1
0
(Initial value)
ACKB
R/W
0
0