DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 447

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Table 13.8 Examples of OCRAR, OCRAF, TOCR, TCORA, TCORB, TCR, and TCSR
Register
TCR in
TMRY
TCSR in
TMRY
TOCRA in
TMRY
TOCRB in
TMRY
TCR in FRT
OCRAR in FRT
OCRAF in FRT
TOCR in FRT
Settings
Bit(s)
7
6
5
4 and 3
2 to 0
3 to 0
1 and 0
6
Abbreviation
CMIEB
CMIEA
OVIE
CCLR1,
CCLR0
CKS2 to CKS0 001
OS3 to OS0
CKS1,
CKS0
OCRAMS
Contents
0
0
0
01
0110
H'3F
(example)
H'03
(example)
01
H'7FEF
(example)
H'000F
(example)
1
Rev. 4.00 Sep 27, 2006 page 401 of 1130
Description
Interrupts due to compare-match and
overflow are disabled
TCNT is cleared by compare-match A
TCNT is incremented on internal clock:
0 output on compare-match B
1 output on compare-match A
IHG signal period =
IHG signal 1 interval =
FRC is incremented on internal clock: /8
IVG signal 0
interval =
IVG signal 1
interval =
OCRA is set to the operating mode in
which OCRAR and OCRAF are used
/4
262016
Section 13 Timer Connection
128
IVG signal period =
times IHG signal)
256
REJ09B0327-0400
262144 (1024
16

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