DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 362

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 11 16-Bit Free-Running Timer
Bit 2—Output Compare Interrupt B Enable (OCIBE): Selects whether to request output
compare interrupt B (OCIB) when output compare flag B (OCFB) in TCSR is set to 1.
Bit 2
OCIBE
0
1
Bit 1—Timer Overflow Interrupt Enable (OVIE): Selects whether to request a free-running
timer overflow interrupt (FOVI) when the timer overflow flag (OVF) in TCSR is set to 1.
Bit 1
OVIE
0
1
Bit 0—Reserved: This bit cannot be modified and is always read as 1.
11.2.7
TCSR is an 8-bit register used for counter clear selection and control of interrupt request signals.
TCSR is initialized to H'00 by a reset and in hardware standby mode.
Timing is described in section 11.3, Operation.
Bit 7—Input Capture Flag A (ICFA): This status flag indicates that the FRC value has been
transferred to ICRA by means of an input capture signal. When BUFEA = 1, ICFA indicates that
the old ICRA value has been moved into ICRC and the new FRC value has been transferred to
ICRA.
ICFA must be cleared by software. It is set by hardware, however, and cannot be set by software.
Rev. 4.00 Sep 27, 2006 page 316 of 1130
REJ09B0327-0400
Bit
Initial value
Read/Write
Note: * Only 0 can be written in bits 7 to 1 to clear these flags.
Timer Control/Status Register (TCSR)
Description
Output compare interrupt request B (OCIB) is disabled
Output compare interrupt request B (OCIB) is enabled
Description
Timer overflow interrupt request (FOVI) is disabled
Timer overflow interrupt request (FOVI) is enabled
R/(W) *
ICFA
7
0
R/(W) *
ICFB
6
0
R/(W) *
ICFC
5
0
R/(W) *
ICFD
4
0
R/(W) *
OCFA
3
0
R/(W) *
OCFB
2
0
R/(W) *
OVF
1
0
(Initial value)
(Initial value)
CCLRA
R/W
0
0