DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 268

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 8 I/O Ports
8.2.2
Table 8.4 shows the port 1 register configuration.
Table 8.4
Name
Port 1 data direction register
Port 1 data register
Port 1 MOS pull-up control
register
Note:
Port 1 Data Direction Register (P1DDR)
P1DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 1. P1DDR cannot be read; if it is, an undefined value will be returned.
P1DDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode. The address output pins maintain their output state in a transition to
software standby mode.
Rev. 4.00 Sep 27, 2006 page 222 of 1130
REJ09B0327-0400
Bit
Initial value
Read/Write
Mode 1
The corresponding port 1 pins are address outputs, regardless of the P1DDR setting.
In hardware standby mode, the address outputs go to the high-impedance state.
Modes 2 and 3 (EXPE = 1)
The corresponding port 1 pins are address outputs or PWM outputs when P1DDR bits are set
to 1, and input ports when cleared to 0.
Modes 2 and 3 (EXPE = 0)
The corresponding port 1 pins are output ports or PWM outputs when P1DDR bits are set to 1,
and input ports when cleared to 0.
* Lower 16 bits of the address.
Register Configuration
Port 1 Registers
P17DDR
W
7
0
P16DDR
W
6
0
Abbreviation
P1DDR
P1DR
P1PCR
P15DDR
W
5
0
P14DDR
W
4
0
R/W
W
R/W
R/W
P13DDR
W
3
0
Initial Value
H'00
H'00
H'00
P12DDR
W
2
0
P11DDR
W
1
0
Address *
H'FFB0
H'FFB2
H'FFAC
P10DDR
W
0
0

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