DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 285

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Port 4 Data Direction Register (P4DDR)
P4DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 4. P4DDR cannot be read; if it is, an undefined value will be returned.
When a bit in P4DDR is set to 1, the corresponding pin functions as an output port, and when
cleared to 0, as an input port.
P4DDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode. As 14-bit PWM and SCI2 are initialized in software standby mode, the
pin states are determined by the TMR0, TMR1, HIF, IIC1, P4DDR, and P4DR specifications.
Port 4 Data Register (P4DR)
P4DR is an 8-bit readable/writable register that stores output data for the port 4 pins (P47 to P40).
If a port 4 read is performed while P4DDR bits are set to 1, the P4DR values are read directly,
regardless of the actual pin states. If a port 4 read is performed while P4DDR bits are cleared to 0,
the pin states are read.
P4DR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
8.5.3
Port 4 pins also function as 14-bit PWM output pins (PWX1, PWX0), 8-bit timer 0 and 1 (TMR0,
TMR1) I/O pins (TMCI0, TMRI0, TMO0, TMCI1, TMRI1, TMO1), timer connection I/O pins
(CSYNCI, HSYNCI, HSYNCO), SCI2 I/O pins (TxD2, RxD2, SCK2), IrDA interface I/O pins
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Pin Functions
P47DR
P47DDR
R/W
7
0
W
7
0
P46DR
P46DDR
R/W
6
0
W
6
0
P45DR
P45DDR
R/W
5
0
W
5
0
P44DR
P44DDR
R/W
4
0
W
4
0
Rev. 4.00 Sep 27, 2006 page 239 of 1130
P43DR
P43DDR
R/W
3
0
W
3
0
P42DR
P42DDR
R/W
2
0
W
2
0
P41DR
P41DDR
Section 8 I/O Ports
R/W
REJ09B0327-0400
1
0
W
1
0
P40DR
P40DDR
R/W
0
0
W
0
0