DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 249

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 7.9
The number of execution states is calculated from the formula below. Note that
of all transfers activated by one activation event (the number for which the CHNE bit is set to one,
plus 1).
For example, when the DTC vector address table is located in on-chip ROM, normal mode is set,
and data is transferred from the on-chip ROM to an internal I/O register, the time required for the
DTC operation is 13 states. The time from activation to the end of the data write is 10 states.
Object of Access
Bus width
Access states
Execution
phase
Number of execution states = I · S
Vector read
Register
information
read/write
Byte data read
Word data read
Byte data write
Word data write
Internal operation S
Number of States Required for Each Execution Phase
S
S
S
S
S
S
I
J
K
K
L
L
M
On-
Chip
RAM
32
1
—
1
1
1
1
1
1
I
+
On-
Chip
ROM
16
1
1
—
1
1
1
1
1
(J · S
Internal I/O
Registers
8
2
—
—
2
4
2
4
1
J
+ K · S
Rev. 4.00 Sep 27, 2006 page 203 of 1130
Section 7 Data Transfer Controller (DTC)
16
2
—
—
2
2
2
2
1
K
+ L · S
External Devices
8
2
4
—
2
4
2
4
1
L
) + M · S
8
3
6+2m
—
3+m
6+2m
3+m
6+2m
1
M
REJ09B0327-0400
means the sum
16
2
2
—
2
2
2
2
1
16
3
3+m
—
3+m
3+m
3+m
3+m
1