DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 373
DF2148RTE20IV
Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of DF2148RTE20IV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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11.3.3
FRC can be cleared when compare-match A occurs. Figure 11.6 shows the timing of this
operation.
11.3.4
Input Capture Input Timing
An internal input capture signal is generated from the rising or falling edge of the signal at the
input capture pin, as selected by the corresponding IEDGx (x = A to D) bit in TCR. Figure 11.7
shows the usual input capture timing when the rising edge is selected (IEDGx = 1).
If the upper byte of ICRA/B/C/D is being read when the corresponding input capture signal
arrives, the internal input capture signal is delayed by one system clock ( ) period. Figure 11.8
shows the timing for this case.
Compare-match A
signal
FRC
Input capture
input pin
Input capture
signal
FRC Clear Timing
Input Capture Input Timing
Figure 11.7 Input Capture Signal Timing (Usual Case)
Figure 11.6 Clearing of FRC by Compare-Match A
N
Rev. 4.00 Sep 27, 2006 page 327 of 1130
Section 11 16-Bit Free-Running Timer
H'0000
REJ09B0327-0400
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