DF2376VFQ33V Renesas Electronics America, DF2376VFQ33V Datasheet - Page 805
![IC H8S/2376 MCU FLASH 144LQFP](/photos/28/61/286116/144-lqfp__plqp0144kc-a_sml.jpg)
DF2376VFQ33V
Manufacturer Part Number
DF2376VFQ33V
Description
IC H8S/2376 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2376VFQ33V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
30K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2376VFQ33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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15.5.2
Figure 15.13 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in
SCR is set to 1, data is skipped until data with a 1 multiprocessor bit is received. On receiving data
with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is
generated at this time. All other SCI operations are the same as in asynchronous mode. Figure
15.12 shows an example of SCI operation for multiprocessor format reception.
MPIE
RDRF
RDR
value
MPIE
RDRF
RDR
value
Multiprocessor Serial Data Reception
1
1
Start
bit
Start
bit
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)
0
0
MPIE = 0
Figure 15.12 Example of SCI Operation in Reception
MPIE = 0
D0
D0
ID1
D1
D1
RXI interrupt
request
(multiprocessor
interrupt)
generated
Data (ID1)
Data (ID2)
RXI interrupt
request
(multiprocessor
interrupt)
generated
D7
D7
(b) Data matches station’s ID
MPB
MPB
(a) Data does not match station’s ID
1
1
RDR data read
and RDRF flag
cleared to 0 in
RXI interrupt
handling routine
RDR data read and
RDRF flag cleared
to 0 in RXI interrupt
handling routine
Section 15 Serial Communication Interface (SCI, IrDA)
Stop
bit
Stop
bit
1
1
Start
bit
Start
bit
0
0
Rev.7.00 Mar. 18, 2009 page 737 of 1136
D0
D0
If not this station’s ID,
MPIE bit is set to 1
again
Matches this station’s ID,
so reception continues, and
data is received in RXI
interrupt handling routine
D1
D1
Data (Data2)
Data (Data1)
ID1
ID2
D7
D7
MPB
MPB
RXI interrupt request is
not generated, and RDR
retains its state
0
0
Stop
bit
Stop
bit
REJ09B0109-0700
MPIE bit set to 1
again
1
1
Idle state
(mark state)
Idle state
(mark state)
1
1
Data2
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