DF2376VFQ33V Renesas Electronics America, DF2376VFQ33V Datasheet - Page 261
![IC H8S/2376 MCU FLASH 144LQFP](/photos/28/61/286116/144-lqfp__plqp0144kc-a_sml.jpg)
DF2376VFQ33V
Manufacturer Part Number
DF2376VFQ33V
Description
IC H8S/2376 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2376VFQ33V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
30K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2376VFQ33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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6.6.4
Table 6.6 shows the pins used for DRAM interfacing and their functions. Since the CS2 to CS5
pins are in the input state after a reset, set the corresponding DDR to 1 when RAS2 to RAS5
signals are output.
Table 6.6
Pin
HWR
CS2
CS3
CS4
CS5
UCAS
LCAS
RD, OE
WAIT
A15 to A0
D15 to D0
Pins Used for DRAM Interface
DRAM Interface Pins
With DRAM
Setting
WE
RAS2/RAS
RAS3
RAS4
RAS5
UCAS
LCAS
OE
WAIT
A15 to A0
D15 to D0
Name
Write enable
Row address strobe 2/
row address strobe
Row address strobe 3
Row address strobe 4
Row address strobe 5
Upper column address
strobe
Lower column address
strobe
Output enable
Wait
Address pins
Data pins
I/O
Output
Output
Output
Output
Output
Output
Output
Output
Input
Output
I/O
Rev.7.00 Mar. 18, 2009 page 193 of 1136
Function
Write enable for DRAM space
access
Row address strobe when area 2
is designated as DRAM space or
row address strobe when areas 2
to 5 are designated as continuous
DRAM space
Row address strobe when area 3
is designated as DRAM space
Row address strobe when area 4
is designated as DRAM space
Row address strobe when area 5
is designated as DRAM space
Upper column address strobe for
16-bit DRAM space access or
column address strobe for 8-bit
DRAM space access
Lower column address strobe
signal for 16-bit DRAM space
access
Output enable signal for DRAM
space access
Wait request signal
Row address/column address
multiplexed output
Data input/output pins
Section 6 Bus Controller (BSC)
REJ09B0109-0700
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