DF2376VFQ33V Renesas Electronics America, DF2376VFQ33V Datasheet - Page 1045
![IC H8S/2376 MCU FLASH 144LQFP](/photos/28/61/286116/144-lqfp__plqp0144kc-a_sml.jpg)
DF2376VFQ33V
Manufacturer Part Number
DF2376VFQ33V
Description
IC H8S/2376 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2376VFQ33V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
30K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2376VFQ33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Clearing Hardware Standby Mode: Hardware standby mode is cleared by means of the STBY
pin and the RES pin. When the STBY pin is driven high while the RES pin is low, the reset state is
set and clock oscillation is started. Ensure that the RES pin is held low until the clock oscillator
stabilizes (for details on the oscillation stabilization time, refer to table 24.2). When the RES pin is
subsequently driven high, a transition is made to the program execution state via the reset
exception handling state.
Hardware Standby Mode Timing: Figure 24.3 shows an example of hardware standby mode
timing.
When the STBY pin is driven low after the RES pin has been driven low, a transition is made to
hardware standby mode. Hardware standby mode is cleared by driving the STBY pin high,
waiting for the oscillation stabilization time, then changing the RES pin from low to high.
Hardware Standby Mode Timing when Power Is Supplied (Only H8S/2378 0.18μm F-ZTAT
Group and H8S/2378R 0.18μm F-ZTAT Group): When entering hardware standby mode
immediately after the power is supplied, the RES signal must be driven low for a given period
with retaining the STBY signal high. After the RES signal is canceled, drive the STBY signal low.
Oscillator
RES
STBY
Figure 24.3 Hardware Standby Mode Timing
Rev.7.00 Mar. 18, 2009 page 977 of 1136
stabilization
Oscillation
Section 24 Power-Down Modes
time
REJ09B0109-0700
exception
handling
Reset
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