DF2376VFQ33V Renesas Electronics America, DF2376VFQ33V Datasheet - Page 41
![IC H8S/2376 MCU FLASH 144LQFP](/photos/28/61/286116/144-lqfp__plqp0144kc-a_sml.jpg)
DF2376VFQ33V
Manufacturer Part Number
DF2376VFQ33V
Description
IC H8S/2376 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2376VFQ33V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
30K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2376VFQ33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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21.2 Input/Output Pins ............................................................................................................... 870
21.3 Register Descriptions ......................................................................................................... 871
21.4 On-Board Programming Mode .......................................................................................... 891
21.5 Protection ........................................................................................................................... 920
21.6 Switching between User MAT and User Boot MAT ......................................................... 923
21.7 Programmer Mode ............................................................................................................. 924
21.8 Serial Communication Interface Specification for Boot Mode .......................................... 924
21.9 Usage Notes ....................................................................................................................... 952
Section 22 Masked ROM...................................................................................953
Section 23 Clock Pulse Generator .....................................................................955
23.1 Register Descriptions ......................................................................................................... 955
23.2 Oscillator............................................................................................................................ 958
23.3 PLL Circuit ........................................................................................................................ 961
23.4 Frequency Divider.............................................................................................................. 961
23.5 Usage Notes ....................................................................................................................... 962
21.1.1 Operating Mode .................................................................................................... 864
21.1.2 Mode Comparison................................................................................................. 865
21.1.3 Flash MAT Configuration..................................................................................... 866
21.1.4 Block Division ...................................................................................................... 867
21.1.5 Programming/Erasing Interface ............................................................................ 868
21.3.1 Programming/Erasing Interface Register .............................................................. 872
21.3.2 Programming/Erasing Interface Parameter ........................................................... 879
21.3.3 Flash Vector Address Control Register (FVACR)................................................ 889
21.4.1 Boot Mode ............................................................................................................ 891
21.4.2 User Program Mode.............................................................................................. 895
21.4.3 User Boot Mode.................................................................................................... 906
21.4.4 Procedure Program and Storable Area for Programming Data ............................. 910
21.5.1 Hardware Protection ............................................................................................. 920
21.5.2 Software Protection............................................................................................... 921
21.5.3 Error Protection..................................................................................................... 921
23.1.1 System Clock Control Register (SCKCR) ............................................................ 955
23.1.2 PLL Control Register (PLLCR) ............................................................................ 957
23.2.1 Connecting a Crystal Resonator............................................................................ 958
23.2.2 External Clock Input ............................................................................................. 959
23.5.1 Notes on Clock Pulse Generator ........................................................................... 962
23.5.2 Notes on Resonator ............................................................................................... 962
23.5.3 Notes on Board Design ......................................................................................... 963
Rev.7.00 Mar. 18, 2009 page xxxix of lxvi
REJ09B0109-0700
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