MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 961

• Manufacturer Part Number: MC9S12DT256MPVE
• Description: IC MCU 256K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12DT256MPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.25 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12D
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 1
• Operating Supply Voltage: 5 V to 2.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68KIT912DP256
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8-ch x 10-bit)
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 12KB
• Cpu Speed: 25MHz
• No. Of Timers: 1
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Port
AD0
AD1
H
P
J
1. Each cell represents one register with individual configuration bits
23.0.6
23.0.6.1
This register holds the value driven out to the pin if the pin is used as a general purpose I/O.
Writing to this register has only an effect on the pin if the pin is used as general purpose output.
When reading this address, the buffered state of the pin is returned if the associated data direction
register bit is set to “0”.
If the data direction register bits are set to logic level “1”, the contents of the data register is
returned. This is independent of any other configuration
23.0.6.2
This is a read-only register and always returns the buffered state of the pin
23.0.6.3
This register defines whether the pin is used as an input or an output.
If a peripheral module controls the pin the contents of the data direction register is ignored
(Figure
Data
yes
yes
yes
yes
yes
23-76).
Registers
Data Register
Input Register
Data Direction Register
Direction
Data
yes
yes
yes
yes
yes
Table 23-67. Register Availability per Port
Input
yes
yes
yes
—
—
Reduced
Drive
yes
yes
yes
yes
yes
Enable
Pull
yes
yes
yes
yes
yes
(Figure
Polarity
Select
yes
yes
yes
—
—
23-76).
1
Wired-OR
Mode
—
—
—
—
—
(Figure
Interrupt
Enable
23-76).
yes
yes
yes
—
—
Interrupt
Flag
yes
yes
yes
—
—