MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 116

• Manufacturer Part Number: MC9S12DT256MPVE
• Description: IC MCU 256K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12DT256MPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.25 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12D
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 1
• Operating Supply Voltage: 5 V to 2.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68KIT912DP256
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8-ch x 10-bit)
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 12KB
• Cpu Speed: 25MHz
• No. Of Timers: 1
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 2 Clocks and Reset Generator (S12CRGV6)
2.6
The interrupts/reset vectors requested by the CRG are listed in
related vector addresses and priorities.
2.6.1
The CRG generates a real time interrupt when the selected interrupt time period elapses. RTI interrupts are
locally disabled by setting the RTIE bit to 0. The real time interrupt flag (RTIF) is set to1 when a timeout
occurs, and is cleared to 0 by writing a 1 to the RTIF bit.
The RTI continues to run during pseudo stop mode if the PRE bit is set to 1. This feature can be used for
periodic wakeup from pseudo stop if the RTI interrupt is enabled.
116
Interrupts
Real Time Interrupt
Internal RESET
Internal RESET
Internal POR
Internal POR
RESET
RESET
Figure 2-26. RESET Pin Tied to V
Real time interrupt
Interrupt Source
LOCK interrupt
SCM interrupt
Figure 2-27. RESET Pin Held Low Externally
MC9S12XDP512 Data Sheet, Rev. 2.21
Table 2-16. CRG Interrupt Vectors
Clock Quality Check
(no Self Clock Mode)
Mask
Clock Quality Check
(no Self-Clock Mode)
CCR
I bit
I bit
I bit
128 SYSCLK
) (
128 SYSCLK
) (
) (
) (
) (
) (
64 SYSCLK
DD
64 SYSCLK
(by a pull-up resistor)
CRGINT (LOCKIE)
CRGINT (SCMIE)
CRGINT (RTIE)
Table
Local Enable
2-16. Refer to MCU specification for
Freescale Semiconductor