MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 1203

• Manufacturer Part Number: MC9S12DT256MPVE
• Description: IC MCU 256K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12DT256MPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.25 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12D
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 1
• Operating Supply Voltage: 5 V to 2.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68KIT912DP256
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8-ch x 10-bit)
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 12KB
• Cpu Speed: 25MHz
• No. Of Timers: 1
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

29.3.2.7
The FCMD register is the Flash command register.
All CMDB bits are readable and writable during a command write sequence while bit 7 reads 0 and is not
writable.
29.3.2.8
The FCTL register is the Flash control register.
All bits in the FCTL register are readable but are not writable.
The FCTL NV bits are loaded from the Flash nonvolatile byte located at global address 0x7F_FF0E during
the reset sequence, indicated by F in
Freescale Semiconductor
CMDB[6:0]
Reset
Reset
Field
6:0
W
W
R
R
Flash Command — Valid Flash commands are shown in
listed in
Flash Command Register (FCMD)
Flash Control Register (FCTL)
0
1
0
0
7
7
Table 29-16
= Unimplemented or Reserved
= Unimplemented or Reserved
NV6
1
F
6
6
Figure 29-12. Flash Command Register (FCMD)
sets the ACCERR flag in the FSTAT register.
Figure 29-13. Flash Control Register (FCTL)
Table 29-16. Valid Flash Command List
Table 29-15. FCMD Field Descriptions
CMDB[6:0]
MC9S12XDP512 Data Sheet, Rev. 2.21
0x05
0x06
0x20
0x40
0x41
0x47
NV5
Figure
F
0
5
5
29-13.
NV4
0
F
4
4
Sector Erase Abort
Description
NVM Command
Data Compress
Word Program
Sector Erase
Erase Verify
Mass Erase
CMDB
Table
NV3
Chapter 29 128 Kbyte Flash Module (S12XFTX128K1V1)
F
0
3
3
29-16. Writing any command other than those
NV2
0
F
2
2
NV1
F
0
1
1
NV0
0
F
0
0
1205