MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 397

IC MCU 256K FLASH 25MHZ 112-LQFP

MC9S12DT256MPVE

Manufacturer Part Number
MC9S12DT256MPVE
Description
IC MCU 256K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12DT256MPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12D
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
91
Number Of Timers
1
Operating Supply Voltage
5 V to 2.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68KIT912DP256
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
12KB
Cpu Speed
25MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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9.2
The IICV2 module has two external pins.
9.2.1
This is the bidirectional serial clock line (SCL) of the module, compatible to the IIC bus specification.
9.2.2
This is the bidirectional serial data line (SDA) of the module, compatible to the IIC bus specification.
9.3
This section provides a detailed description of all memory and registers for the IIC module.
9.3.1
The memory map for the IIC module is given below in
the address offset.The total address for each register is the sum of the base address for the IIC module and
the address offset for each register.
Freescale Semiconductor
External Signal Description
Memory Map and Register Definition
IIC_SCL — Serial Clock Line Pin
IIC_SDA — Serial Data Line Pin
Module Memory Map
MC9S12XDP512 Data Sheet, Rev. 2.21
Table
Chapter 9 Inter-Integrated Circuit (IICV2) Block Description
1-1. The address listed for each register is
397

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