MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 361

IC MCU 256K FLASH 25MHZ 112-LQFP

MC9S12DT256MPVE

Manufacturer Part Number
MC9S12DT256MPVE
Description
IC MCU 256K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12DT256MPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12D
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
91
Number Of Timers
1
Operating Supply Voltage
5 V to 2.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68KIT912DP256
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
12KB
Cpu Speed
25MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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7.4.3
This section describes interrupts originated by the ECT block. The MCU must service the interrupt
requests.
The ECT only originates interrupt requests. The following is a description of how the module makes a
request and how the MCU should acknowledge that request. The interrupt vector offset and interrupt
number are chip dependent.
7.4.3.1
This active high output will be asserted by the module to request a timer channel 7–0 interrupt to be
serviced by the system controller.
7.4.3.2
This active high output will be asserted by the module to request a modulus counter underflow interrupt
to be serviced by the system controller.
7.4.3.3
This active high output will be asserted by the module to request a timer pulse accumulator B overflow
interrupt to be serviced by the system controller.
7.4.3.4
This active high output will be asserted by the module to request a timer pulse accumulator A input
interrupt to be serviced by the system controller.
7.4.3.5
This active high output will be asserted by the module to request a timer pulse accumulator A overflow
interrupt to be serviced by the system controller.
7.4.3.6
This active high output will be asserted by the module to request a timer overflow interrupt to be serviced
by the system controller.
Freescale Semiconductor
Table 7-37
Timer channel 7–0
Modulus counter underflow
Pulse accumulator B overflow
Pulse accumulator A input
Pulse accumulator A overflow
Timer overflow
Interrupts
Channel [7:0] Interrupt
Modulus Counter Interrupt
Pulse Accumulator B Overflow Interrupt
Pulse Accumulator A Input Interrupt
Pulse Accumulator A Overflow Interrupt
Timer Overflow Interrupt
Interrupt Source
lists the interrupts generated by the ECT to communicate with the MCU.
MC9S12XDP512 Data Sheet, Rev. 2.21
Table 7-37. ECT Interrupts
Active high timer channel interrupts 7–0
Active high modulus counter interrupt
Active high pulse accumulator B interrupt
Active high pulse accumulator A input interrupt
Pulse accumulator overflow interrupt
Timer 0verflow interrupt
Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
Description
361

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