MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 664

IC MCU 256K FLASH 25MHZ 112-LQFP

MC9S12DT256MPVE

Manufacturer Part Number
MC9S12DT256MPVE
Description
IC MCU 256K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12DT256MPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12D
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
91
Number Of Timers
1
Operating Supply Voltage
5 V to 2.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68KIT912DP256
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
12KB
Cpu Speed
25MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 18 Memory Mapping Control (S12XMMCV3)
18.3.2.6
Read: Anytime
Write: Anytime
These eight index bits are used to page 4 KByte blocks into the RAM page window located in the local
(CPU or BDM) memory map from address 0x1000 to address 0x1FFF (see
accessing up to 1022 Kbytes of RAM (in the Global map) within the 64 KByte Local map. The RAM page
index register is effectively used to construct paged RAM addresses in the Local map
664
Address: 0x0016
Reset
W
R
1
2
Internal Flash means Flash resources inside the MCU are read/written.
Emulation memory means resources inside the emulator are read/written (PRU registers, flash
replacement, RAM, EEPROM and register space are always considered internal).
External application means resources residing outside the MCU are read/written.
The external access stretch mechanism is part of the EBI module (refer to EBI Block Guide for details).
Emulation Single Chip
Emulation Expanded
RP7
Special Single Chip
Normal Single Chip
RAM Page Index Register (RPAGE)
Normal Expanded
1
7
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Chip Modes
Special Test
Table 18-11. Data Sources when CPU or BDM is Accessing Flash Area
RP6
1
6
Figure 18-11. RAM Page Index Register (RPAGE)
MC9S12XDP512 Data Sheet, Rev. 2.21
RP5
ROMON
1
5
X
X
X
0
1
0
1
1
0
1
CAUTION
RP4
EROMON
1
4
X
X
X
X
X
X
0
1
0
1
RP3
1
3
External Application
External Application
External Application
Emulation Memory
Emulation Memory
DATA SOURCE
Internal Flash
Internal Flash
Internal Flash
Internal Flash
Internal Flash
RP2
1
2
Figure
1
18-12). This supports
Freescale Semiconductor
RP1
format.
0
1
Stretch
N
N
N
N
N
Y
Y
2
RP0
1
0

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