MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 186

IC MCU 256K FLASH 25MHZ 112-LQFP

MC9S12DT256MPVE

Manufacturer Part Number
MC9S12DT256MPVE
Description
IC MCU 256K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12DT256MPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12D
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
91
Number Of Timers
1
Operating Supply Voltage
5 V to 2.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68KIT912DP256
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
12KB
Cpu Speed
25MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 6 XGATE (S12XGATEV2)
6.3
This section provides a detailed description of address space and registers used by the XGATE module.
The memory map for the XGATE module is given below in
is the sum of a base address and an address offset. The base address is defined at the SoC level and the
address offset is defined at the module level. Reserved registers read zero. Write accesses to the reserved
registers have no effect.
6.3.1
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
186
XGMCHID R
Reserved
Reserved
Reserved
XGMCTL
Register
XGVBR
Name
Memory Map and Register Definition
W
W
W
W
W
W
R
R
R
R
R
Register Descriptions
XGEM
15
0
= Unimplemented or Reserved
FRZM
XG
14
0
DBGM
XG
13
0
Figure 6-2. XGATE Register Summary (Sheet 1 of 3)
XGSSM
12
0
MC9S12XDP512 Data Sheet, Rev. 2.21
FACTM
11
XG
0
10
0
SWEIFM
XG
9
0
XGVBR[15:1]
XGIEM
8
0
Figure
XGE XGFRZ XGDBG XGSS
7
0
6-2.The address listed for each register
6
5
4
XGCHID[6:0]
FACT
XG
Freescale Semiconductor
3
2
0
SWEIF
XG
1
XGIE
0
0

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