MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 132

IC MCU 256K FLASH 25MHZ 112-LQFP

MC9S12DT256MPVE

Manufacturer Part Number
MC9S12DT256MPVE
Description
IC MCU 256K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12DT256MPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12D
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
91
Number Of Timers
1
Operating Supply Voltage
5 V to 2.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68KIT912DP256
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
12KB
Cpu Speed
25MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description
4.3.2.3
This register controls power down, interrupt and external trigger. Writes to this register will abort current
conversion sequence but will not start a new sequence.
132
1
ETRIGSEL
Only if ETRIG[3:0] input option is available (see device specification), else ETRISEL is ignored, that means
external trigger source remains on one of the AD channels selected by ETRIGCH[3:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
ATD Control Register 2 (ATDCTL2)
ETRIGCH3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
Table 4-5. External Trigger Channel Select Coding
ETRIGCH2
MC9S12XDP512 Data Sheet, Rev. 2.21
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
ETRIGCH1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
X
X
ETRIGCH0
X
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
External Trigger Source
Reserved
Reserved
ETRIG0
ETRIG1
ETRIG2
ETRIG3
AN10
AN11
AN12
AN13
AN14
AN15
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
Freescale Semiconductor
1
1
1
1

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