MCHC912B32CFUE8 Freescale Semiconductor, MCHC912B32CFUE8 Datasheet - Page 80

• Manufacturer Part Number: MCHC912B32CFUE8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MCHC912B32CFUE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Package: 80PQFP
• Family Name: HC12
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 63
• Processor Series: HC912B
• Core: HC12
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912B32E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Operating Modes and Resource Mapping
5.4.2 Register Initialization Register
After reset, the 512-byte register block resides at location $0000 but can be reassigned to any 2-Kbyte
boundary within the standard 64-Kbyte address space. Mapping of internal registers is controlled by five
bits in the register initialization register (INITRG). The register block occupies the first 512 bytes of the
2-Kbyte block.
Read: Anytime
Write: Once in normal modes; anytime in special modes
REG15–REG11 — Register Position Bits
MMSWAI — Memory Mapping Interface Stop in Wait Control Bit
5.4.3 RAM Initialization Register
After reset, addresses of the 1-Kbyte RAM array begin at location $0800 but can be assigned to any
2-Kbyte boundary within the standard 64-Kbyte address space. Mapping of internal RAM is controlled by
five bits in the RAM initialization register (INITRM). The RAM array occupies the first 1 Kbyte of the
2-Kbyte block.
Read: Anytime
Write: Once in normal modes; anytime in special modes
RAM15–RAM11 — RAM Position Bits
80
These bits specify the upper five bits of the 16-bit register address.
This bit controls access to the memory mapping interface when in wait mode.
Normal modes: Write anytime
Special modes: Write never
These bits specify the upper five bits of the 16-bit RAM address.
0 = Memory mapping interface continues to function in wait mode.
1 = Memory mapping interface access shuts down in wait mode.
Address: $0011
Reset:
Read:
Write:
Address: $0010
Reset:
Read:
Write:
REG15
Bit 7
RAM15
0
Bit 7
0
Figure 5-2. Register Initialization Register (INITRG)
Figure 5-3. RAM Initialization Register (INITRM)
REG14
RAM14
6
0
6
0
M68HC12B Family Data Sheet, Rev. 9.1
REG13
RAM13
5
0
5
0
REG12
RAM12
4
0
4
0
RAM11
REG11
3
1
3
0
2
0
0
2
0
0
1
0
0
1
0
0
Freescale Semiconductor
Bit 0
MMSWAI
0
0
Bit 0
0