MCHC912B32CFUE8 Freescale Semiconductor, MCHC912B32CFUE8 Datasheet - Page 171

• Manufacturer Part Number: MCHC912B32CFUE8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MCHC912B32CFUE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Package: 80PQFP
• Family Name: HC12
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 63
• Processor Series: HC912B
• Core: HC12
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912B32E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.4.8 Timer Interrupt Mask Registers
Read: Anytime
Write: Anytime
C7I–C0I — Input Capture/Output Compare x Interrupt Enable Bits
Read: Anytime
Write: Anytime
TOI — Timer Overflow Interrupt Enable Bit
PUPT — Timer Port Pullup Resistor Enable Bit
RDPT — Timer Port Drive Reduction Bit
TCRE — Timer Counter Reset Enable Bit
Freescale Semiconductor
The bits in TMSK1 correspond bit-for-bit with the bits in the TFLG1 status register. If cleared, the
corresponding flag is disabled from causing a hardware interrupt. If set, the corresponding flag is
enabled to cause a hardware interrupt.
This enable bit controls pullup resistors on the timer port pins when the pins are configured as inputs.
This bit reduces the effective output driver size which can reduce power supply current and generated
noise depending upon pin loading.
This bit allows the timer counter to be reset by a successful output compare 7 event. This mode of
operation is similar to an up-counting modulus counter.
0 = Interrupt inhibited
1 = Hardware interrupt requested when TOF flag set
0 = Disable pullup resistor function
1 = Enable pullup resistor function
0 = Normal output drive capability
1 = Enable output drive reduction function
0 = Counter reset inhibited and counter runs free
1 = Counter reset by a successful output compare 7
Address: $008C
Address: $008D
If TC7 = $0000 and TCRE = 1, TCNT will stay at $0000 continuously.
If TC7 = $FFFF and TCRE = 1, TOF will never be set when TCNT is reset
from $FFFF to $0000.
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 13-16. Timer Interrupt Mask 1 Register (TMSK1)
Figure 13-17. Timer Interrupt Mask 2 Register (TMSK2)
Bit 7
Bit 7
C7I
TOI
0
0
C6I
6
0
6
0
0
M68HC12B Family Data Sheet, Rev. 9.1
PUPT
C5I
5
0
5
0
NOTE
RDPT
C4I
4
0
4
0
TCRE
C3I
3
0
3
0
PR2
C2I
2
0
2
0
PR1
C1I
1
0
1
0
Bit 0
Bit 0
PR0
C0I
0
0
Timer Registers
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