ZL30226/GA ZARLINK [Zarlink Semiconductor Inc], ZL30226/GA Datasheet - Page 99
ZL30226/GA
Manufacturer Part Number
ZL30226/GA
Description
4/8/16 Port IMA/TC PHY Device for xDSL
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL30226GA.pdf
(141 pages)
- Current page: 99 of 141
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Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
15:14
Bit #
Bit #
Bit #
13:0
15:9
15:0
8:7
5:4
3:0
6
Type
Type
Type
R/W
R/W
R/W
R/W
R/W
R
R
R
Unused. Read all 0’s.
Unused. Read all 0’s.
Write 00 for normal operation.
Writing a 1 will reset the value of the maximum delay over time register for the selected
IMA Group (see bits 2:0).
Delay register:
11: Maximum Delay over time (see bits 2:0)
10: Current Maximum Delay for an IMA Group (see bits 2:0)
01: Current Minimum Delay for an IMA Group (see bits 2:0)
00: Current Delay for a link (see bits 3:0)
Bits 3:0 are used to specify the physical link number.
Bits 2:0 are used to specify the physical IMA Group number, based on the delay selected
Value of the Maximum Operational Delay.
Each bit reports the recombiner status for a link. A 1 means that the recombiner is
enabled. The bit 15 reports for link 15, bit 14 reports for link 14 and so on so forth.
Do not write to this register.
0x029A - 0x02A1 (8 reg)
and 3 are used.
0x02AA
value to read.
0x02AD
1 register per IMA Group (value in number of cells). For ZL30226 groups 0, 1, 2
0000
Used to initiate an update of the RX Delay registers based on the link and delay
0000
0000
Table 69 - RX Maximum Operational Delay Register
Table 71 - Enable Recombiner Status Register
(1 reg)
(1 reg)
Table 70 - RX Delay Select Register
Zarlink Semiconductor Inc.
ZL30226/7/8
99
Description
Description
Description
Data Sheet
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