ZL30226/GA ZARLINK [Zarlink Semiconductor Inc], ZL30226/GA Datasheet - Page 122

• Manufacturer Part Number: ZL30226/GA
• Description: 4/8/16 Port IMA/TC PHY Device for xDSL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

AC Electrical Characteristics - Utopia Interface Transmit Timing (≤ 25 MHz)
-
AC Electrical Characteristics - UTOPIA Interface Receive Timing (≤ 25 MHz)
- Multi-PHY operation with up to 8 input loads of 10 pF each (80 pF total).
UTxClk
UTxData[15:0], UTxSOC,
UTxPAR, UTxEnb,
UTxAddr[4:0]
UTxClav[0]
URxClk
URxEnb, URxAddr[4:0]
URxData[15:0], URxSOC,
URxClav[0], URxPAR
Multi-PHY operation with up to 8 input loads of 10 pF each (80 pF total)
Signal name
Signal name
A->P
A->P
A<-P
DIR
A->P
A->P
A<-P
DIR
Item
tT10
tT12
tT11
tOD
tT2
tT3
tT4
tT5
tT6
tT8
tT9
Item
tT10
tT12
tT11
tOD
f1
tT2
tT3
tT4
tT5
tT6
tT8
tT9
f1
Zarlink Semiconductor Inc.
RxClk frequency (nominal)
RxClk duty cycle
RxClk peak-to-peak jitter
RxClk rise/fall time
Input setup to RxClk
Input hold from RxClk
Output delay from RxClk
Output hold from RxClk
Signal going low impedance to RxClk
Signal going high impedance to RxClk
Signal going low impedance from RxClk
Signal going high impedance from RxClk
TxClk frequency (nominal)
TxClk duty cycle
TxClk peak-to-peak jitter
TxClk rise/fall time
Input setup to TxClk
Input hold from TRxClk
Output delay from TxClk
Output hold from TxClk
Signal going low impedance to TxClk
Signal going high impedance to TxClk
Signal going low impedance from TxClk
Signal going high impedance from TRxClk
ZL30226/7/8
122
Description
Description
10 ns
10 ns
10 ns
10 ns
Min.
40%
Min.
40%
1 ns
1 ns
1 ns
1 ns
0 ns
1 ns
1 ns
1 ns
0 ns
1 ns
0
0
-
-
-
-
-
-
Data Sheet
25 MHz
25 MHz
27 ns
27 ns
Max.
Max.
60%
4 ns
60%
4 ns
5%
5%
-
-
-
-
-
-
-
-
-
-
-
-
-
-