ZL30226/GA ZARLINK [Zarlink Semiconductor Inc], ZL30226/GA Datasheet - Page 111

• Manufacturer Part Number: ZL30226/GA
• Description: 4/8/16 Port IMA/TC PHY Device for xDSL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Address
Bit #
Bit #
15:0
15:8
Offset
7:0
(Hex)
00
01
02
03
04
05
Type
Type
R/W
Type
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Each bit represents a link. A ’1’ means that the corresponding link has a valid request for
interrupt. The level of the IRQ pin is controlled by the bits in this register and the
corresponding bits in the IRQ Master Enable Register. A write does not have any affect on
the bits in this register. The status bit is not latched and changing the mask bit in the IRQ
Master Register has a direct effect on the level of the IRQ pin.
Unused. Read all 0’s.
Each bit set to ’1’ represent an overflow condition from the IMA Group associated with the
bit. There is one bit for each IMA Group. A bit is set when one or more of the 4 counters or
the RX UTOPIA FIFO associated with an IMA Group overflows.
Byte #
10, 9
12, 11
MSB,
4, 3
ATM
LSB
2, 1
6, 5
8, 7
0x0455 (1 reg)
1 register for all 16 links.
0000
0x0457 (1 reg)
1 register for all IMA groups.
0000
8 blocks of 32 words (16 bits) from 0x0500 to 0x05FF
Access these locations directly then use transfer command to copy to internal
memory.
These registers need to be initialized for proper operation.
Table 97 - IRQ IMA Group Overflow Status Register
LSB: Byte 1 (Header 1 byte) of ICP Cell. The value should be set to 0x00
MSB: Byte 2 (Header 2 byte) of ICP Cell. The value should be set to 0x00
LSB: Byte 3 (Header 3 byte) of ICP Cell. The value should be set to 0x00
MSB: Byte 4 (Header 4 byte) of ICP Cell. The value should be set to 0x0B
LSB: HEC is always calculated and inserted by the ZL30226/7/8.
MSB: OAM, should be set to either 0x01 or 0x03
LSB: Cell ID, Link ID. The bit 7 (Cell ID) is controlled by the ZL30226/7/8, the
Link ID is provided by the TX Link ID Register.
MSB: IMA Frame Sequence Number. Inserted by the ZL30226/7/8.
LSB: ICP Cell Offset. Inserted by the ZL30226/7/8 based on the Link Offset
register info.
MSB: Link Stuff Indication. Inserted by the ZL30226/7/8
LSB: Status & Control Change Indication. Inserted by the ZL30226/7/8.
MSB: IMA ID
Table 96 - IRQ Master Status Register
Table 98 - TX IMA ICP Cell Registers
Zarlink Semiconductor Inc.
ZL30226/7/8
111
Description
Description
Description
Data Sheet