ZL30226/GA ZARLINK [Zarlink Semiconductor Inc], ZL30226/GA Datasheet - Page 33

• Manufacturer Part Number: ZL30226/GA
• Description: 4/8/16 Port IMA/TC PHY Device for xDSL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

1.2
The ZL30226/7/8 circuitry implements the following functions:
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The ZL30226/7/8 can be separated into four major independent blocks and five support blocks. The four major
independent blocks are:
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The five support blocks are:
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UTOPIA L1 and L2 compatible Interface (8-bit mode wide bus supported with UTOPIA clock of up to 52 MHz
and 16- bit wide with UTOPIA clock of up to 33 MHz)
verification of the incoming HEC (optional)
generation of a new HEC byte
transmit scheduler
generation of the TX IMA Data Cell Rate (IDCR) clock
generation and insertion of ICP cells, Filler Cells and Stuff Cells in IMA mode
generation of Idle Cells in TC mode (from on-chip copies of the cell)
flexible serial link (TDM) formatting of the outgoing bytes
retrieval of ATM Cells from the incoming flexible TDM format
cell delineation
retrieval and processing of ICP cells
synchronization of the IMA Frame
management of the internal re-sequencer RX links (when active)
extraction of the RX IDCR
verification of the delays between links
re-sequencing of ATM cells using external Static RAM
various performance monitoring counters
16-bit microprocessor interface (adaptable to Intel or Motorola interfaces)
the ATM Transmit Path
the ATM Receive Path
the TDM Interface
the UTOPIA Interface
the Counter Block
the Interrupt Block
the Microprocessor Interface Block
the Cell Preprocessor Block
the TDM Ring Block
Hardware Functions
Zarlink Semiconductor Inc.
ZL30226/7/8
33
Data Sheet