ZL30226/GA ZARLINK [Zarlink Semiconductor Inc], ZL30226/GA Datasheet - Page 125

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ZL30226/GA

Manufacturer Part Number
ZL30226/GA
Description
4/8/16 Port IMA/TC PHY Device for xDSL
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
‡ Typical figures are at 25
Note 1: t
AC Electrical Characteristics - External Memory Interface Timing - Write Access
t
t
t
t
t
t
t
t
t
t
CLK
WC
AVWS
AVWH
CSWS
CSWH
WEWS
WEWH
WDS
WDH
Item
Note: The SR_WE signal stays LOW until a READ cycle is to be performed
System Clock
WC
SR_A[18:0]
SR_D[7:0]
= t
SR_WE
SR_CS
ZL30226/7/8 System Clock Period
Write Cycle Time
Address Setup Time
Address Hold Time
Chip Select Setup Time
Chip Select Hold Time
Write Enable* Setup Time
Write Enable* Hold Time
Data Setup Time
Data Hold Time
CLK
Refer to SRAM Control Register to select the number of cycles
- t
CSWS.
°
C, V
DD
Figure 22 - External Memory Interface Timing - Write Cycle
=3.3 V, and for design aid only: not guaranteed and not subject to production testing.
Description
Zarlink Semiconductor Inc.
t
ZL30226/7/8
avws
t
t
wds
csws
125
t
wews
Address Valid
Data Valid
12.5 ns
t
19 ns
cswh
Min.
t
0 ns
0 ns
1 ns
1 ns
0 ns
0 ns
0 ns
wc
1
Typ.
20 ns
t
avwh
t
wdh
t
wewh
t
clk
Data Sheet
9.5 ns
7.5 ns
7.5 ns
9.5 ns
19 ns
Max.

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