ZL50120 Zarlink, ZL50120 Datasheet - Page 2

• Manufacturer Part Number: ZL50120
• Description: 32 / 64 / 128 Channel CESoP Processors
• Manufacturer: Zarlink

System Interfaces
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Packet Processing Functions
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Applications
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Flexible 32 bit Motorola host interface
On-chip packet memory with jitter buffer compensation for over 128 ms of packet delay variation
Flexible, multi-protocol packet encapsulation including IPv4, IPv6, RTP, MPLS, L2TPv3, ITU-T Y.1413, IETF
CESoPSN, IETF SAToP and user programmable
Packet re-sequencing to allow lost packet detection and re-ordering
Four classes of service with programmable priority mechanisms (WFQ and SP) using egress queues
Programmable classification of incoming packets at layers 2 through 5
Wire speed processing of all packets regardless of classification providing low latency
Supports up to 128 separate CESoP connections across the Packet Switched Network
Circuit Emulation Services over Packet Networks
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Customer-premise and Provider Edge Routers and Switches
Ethernet and IP based IADs
Leased Line support over packet networks
TDM over Cable
TDM over WiFi (802.11x)
TDM over WiMAX (802.16)
Fibre To The Premises G/E-PON
Layer 2 VPN services
ZL50115/16/17/18/19/20
Zarlink Semiconductor Inc.
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Data Sheet