dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 87
dsp56800eerm
Manufacturer Part Number
dsp56800eerm
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56800EERM.pdf
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5.6.5.1
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.5.2
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.5.3
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.5.4
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.5.5
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
Freescale Semiconductor
Preliminary
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00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
SPI0 Receiver Full Interrupt Priority Level (SPI0_RCV IPL)—
Bits 15–14
SPI1 Transmit Empty Interrupt Priority Level (SPI1_XMIT IPL)—
Bits 13–12
SPI1 Receiver Full Interrupt Priority Level (SPI1_RCV IPL)—
Bits 11–10
Reserved—Bits 9–6
GPIOA Interrupt Priority Level (GPIOA IPL)—Bits 5–4
56F8357 Technical Data, Rev. 15
Register Descriptions
87
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