dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 25

• Manufacturer Part Number: dsp56800eerm
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
Preliminary
(GPIOF0)
(GPIOF1)
(GPIOF2)
(GPIOF3)
(GPIOF4)
(GPIOF5)
(GPIOF6)
(GPIOF7)
(GPIOF8)
Signal
Name
D10
D11
D12
D13
D14
D15
RD
D7
D8
D9
Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA
149
150
151
152
153
Pin
No.
28
29
30
32
52
Ball No.
C4
K1
K3
K2
K4
A5
A4
B5
A3
P5
Output
Output
Output
Input/
Input/
Type
56F8357 Technical Data, Rev. 15
disabled,
pull-up is
disabled,
pull-up is
output is
output is
In reset,
enabled
In reset,
enabled
During
Reset
State
Data Bus — D7 - D14 specify part of the data for external
program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), D7 - D15and EMI control signals are tri-stated
when the external bus is inactive.
Most designs will want to change the DRV state to DRV = 1
instead of using the default setting.
Port F GPIO — These eight GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to data bus functionality.
To deactivate the internal pull-up resistor, clear the appropriate
GPIO bit in the GPIOF_PUR register.
Example: GPIOF0, clear bit 0 in the GPIOF_PUR register.
Read Enable — RD is asserted during external memory read
cycles. When RD is asserted low, pins D0 - D15 become
inputs and an external device is enabled onto the data bus.
When RD is deasserted high, the external data is latched
inside the device. When RD is asserted, it qualifies the A0 -
A23, PS, DS, and CSn pins. RD can be connected directly to
the OE pin of a static RAM or ROM.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), RD is tri-stated when the external bus is inactive.
Most designs will want to change the DRV state to DRV = 1
instead of using the default setting.
To deactivate the internal pull-up resistor, set the CTRL bit in
the SIM_PUDR register.
Signal Description
Signal Pins
25