dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 17

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dsp56800eerm

Manufacturer Part Number
dsp56800eerm
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Freescale Semiconductor
Preliminary
* When the on-chip regulator is disabled, these
four pins become 2.5V V
External
Address
or GPIO
External
External
or GPIO
SCI 0 or
1. Alternate pin functionality is shown in parenthesis; pin direction/type shown is the default functionality
Ground
Ground
EOnCE
Control
Supply
Power
Power
Power
JTAG/
Other
Clock
GPIO
SCI 1
Ports
Data
PLL
Port
Bus
Bus
Bus
and
Figure 2-1 56F8357 Signals Identified by Functional Group
GPIOB4 (A20, prescaler_clock)
GPIOB7 (A23, oscillator_clock)
GPIOB6 (A22, SYS_CLK2)
GPIOB5 (A21, SYS_CLK)
A8 - A15 (GPIOA0 - 7)
A0 - A5 (GPIOA8 - 13)
D0 - D6 (GPIOF9 - 15)
D7 - D15 (GPIOF0 - 8)
GPIOB0 - 3 (A16 - 19)
PS / CS0 (GPIODF8)
DS / CS1 (GPIOFD9)
GPIOD0 - 5 (CS2 - 7)
DD_CORE
A6 - A7 (GPIOE2 - 3)
RXD0 (GPIOE1)
RXD1 (GPIOD7)
TXD1 (GPIOD6)
TXD0 (GPIOE0)
V
V
CAP
V
.
DDA_OSC_PLL
PP
CLKMODE
V
V
OCR_DIS
1 - V
1 & V
DDA_ADC
SSA_ADC
V
EXTAL
TRST
DD_IO
CLKO
CAP
TMS
TDO
XTAL
TCK
WR
V
PP
TDI
RD
SS
4
2
56F8357 Technical Data, Rev. 15
4
2
1
7
1
1
1
1
1
1
1
6
2
8
4
9
1
1
6
1
1
1
1
1
1
1
1
7
6
1
1
1
1
1
1
1
56F8357
6
3
4
1
1
1
1
1
1
1
1
1
1
1
1
6
3
4
1
2
4
1
1
1
1
1
8
5
8
1
1
1
PWMB0 - 5
FAULTB0 - 3
PHASEA0 (TA0, GPIOC4)
PHASEB0 (TA1, GPIOC5)
HOME0 (TA3, GPIOC7)
MOSI0 (GPIOE5)
ISB0 - 2 (GPIOD10 - 12)
INDEX0 (TA2, GPIOC6)
SS0 (GPIOE7)
HOME1 (TB3, SS1, GPIOC3)
FAULTA0 - 3
SCLK0 (GPIOE4)
MISO0 (GPIOE6)
PHASEB1 (TB1, MOSI1, GPIOC1)
INDEX1 (TB2, MISO1, GPIOC2)
PWMA0 - 5
ISA0 - 2 (GPIOC8 - 10)
CAN_RX
CAN_TX
PHASEA1(TB0, SCLK1, GPIOC0)
ANA0 - 7
V
ANB0 - 7
Temp_Sense
RSTO
TC0 - 1 (GPIOE8 - 9)
TD0 - 3 (GPIOE10 - 13)
IRQB
EXTBOOT
EMI_MODE
RESET
IRQA
REF
1
(160-pin LQFP)
PWMB
Quadrature
Decoder 1 or
Quad Timer B
or SPI 1 or
GPIO
PWMA
ADCA
Temperature
Sense Diode
FlexCAN
INTERRUPT/
PROGRAM
CONTROL
Quadrature
Decoder 0
or Quad
Timer A
SPI0 or
GPIO
ADCB
Quad Timer
C and D or
GPIO
Introduction
17

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