dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 66

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dsp56800eerm

Manufacturer Part Number
dsp56800eerm
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
66
GPIOB_PUR
GPIOB_DR
GPIOB_DDR
GPIOB_PER
GPIOA_PUR
GPIOA_DR
GPIOA_DDR
GPIOA_PER
GPIOA_IAR
GPIOA_IENR
GPIOA_IPOLR
GPIOA_IPR
GPIOA_IESR
GPIOA_PPMODE
GPIOA_RAWDATA
Register Acronym
Register Acronym
PLLCR
PLLDB
PLLSR
SHUTDOWN
OSCTL
Register Acronym
Table 4-28 Clock Generation Module Registers Address Map
Address Offset
Address Offset
Table 4-29 GPIOA Registers Address Map
Table 4-30 GPIOB Registers Address Map
$0
$1
$2
$3
$A
$0
$1
$2
$3
$4
$5
$6
$7
$8
$9
Address Offset
(CLKGEN_BASE = $00 F2D0)
(GPIOA_BASE = $00 F2E0)
(GPIOB_BASE = $00 F300)
$0
$1
$2
$4
$5
Pull-up Enable Register
Data Register
Data Direction Register
Peripheral Enable Register
56F8357 Technical Data, Rev. 15
Pull-up Enable Register
Data Register
Data Direction Register
Peripheral Enable Register
Interrupt Assert Register
Interrupt Enable Register
Interrupt Polarity Register
Interrupt Pending Register
Interrupt Edge-Sensitive Register
Push-Pull Mode Register
Raw Data Input Register
Register Description
Register Description
Control Register
Divide-By Register
Status Register
Reserved
Shutdown Register
Oscillator Control Register
Register Description
0 x 000F for 20-bit EMI address at reset.
0 x 0000 for all other cases.
See
Table 4-4
Reset Value
Reset Value
0 x 00FF
0 x 0000
0 x 0000
Freescale Semiconductor
0 x 3FFF
0 x 3FFF
0 x 3FFF
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 0000
for details.
Preliminary

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