dsp56800eerm Freescale Semiconductor, Inc, dsp56800eerm Datasheet - Page 86

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dsp56800eerm

Manufacturer Part Number
dsp56800eerm
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
5.6.4.5
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.4.6
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.4.7
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.4.8
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.5
86
Base + $4
RESET
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
Read
Write
Interrupt Priority Register 4 (IPR4)
FlexCAN Wake Up Interrupt Priority Level (FCWKUP IPL)—
Bits 7–6
FlexCAN Error Interrupt Priority Level (FCERR IPL)— Bits 5–4
FlexCAN Bus Off Interrupt Priority Level (FCBOFF IPL)— Bits 3–2
Reserved—Bits 1–0
15
SPI0_RCV
0
IPL
14
0
Figure 5-7 Interrupt Priority Register 4 (IPR4)
SPI1_XMIT
13
0
IPL
12
0
56F8357 Technical Data, Rev. 15
11
SPI1_RCV
0
IPL
10
0
9
0
0
8
0
0
7
0
0
6
0
0
5
0
GPIOA
PL
4
0
3
0
Freescale Semiconductor
GPIOB
IPL
2
0
1
0
GPIOC
IPL
Preliminary
0
0

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